Centre invites applications from domestic chip design firms

18 Jan 2022 CW Team

Financial incentives and design infrastructure support will be extended to domestic companies, startups, and MSMEs across various stages of development and deployment of semiconductor design for Integrated Circuits (ICs), Chipsets, System on Chips (SoCs), Systems & IP Cores, and semiconductor linked design for five years under the DLI Scheme, which was announced by MeitY in December.

The initiative, which was unveiled in December as part of a Rs 76,000 crore or $10 billion packages, intends to nurture at least 20 indigenous semiconductor design companies and help them attain a turnover of more than Rs 1500 crore in the following five years.

The DLI programme will be implemented by the Centre for Development of Advanced Computing (C-DAC), a scientific society that operates under MeitY.

Chip Design infrastructure support, Product Design Linked Incentive, and Deployment Linked Incentive are the three components of the programme.

C-DAC will establish the India Chip Centre to host state-of-the-art design infrastructures such as EDA Tools, IP Cores, and support for Multi-Project Wafer fabrication (MPW) and post-silicon validation) and facilitate its access to supported companies as part of the Chip Design Infrastructure Support programme.

Reimbursement of up to 50% of eligible expenditures, subject to a cap of Rs 15 crore per application, will be offered as fiscal support to accepted applicants engaging in semiconductor design under the Product Design Linked Incentive component.

Approved applicants whose semiconductor design for Integrated Circuits (ICs), Chipsets, System on Chips (SoCs), Systems & IP Cores, and semiconductor linked design is deployed in electronic products will receive a 6% to 4% of net sales turnover over five years, subject to a ceiling of 30 crore per application, under the Deployment Linked Incentive component.

The DLI Scheme will also take a graded and proactive approach to identify national priorities and develop strategies for complete or near-complete indigenisation and deployment, thereby advancing import substitution and value addition in strategic and social sectors.

Image Source

The Ministry of Electronics and Information (MeitY) is inviting submissions from 100 domestic enterprises, start-ups, and MSMEs under its Design Linked Incentive (DLI) Scheme, to create a robust ecosystem for Semiconductor Chip Design in the country. Financial incentives and design infrastructure support will be extended to domestic companies, startups, and MSMEs across various stages of development and deployment of semiconductor design for Integrated Circuits (ICs), Chipsets, System on Chips (SoCs), Systems & IP Cores, and semiconductor linked design for five years under the DLI Scheme, which was announced by MeitY in December. The initiative, which was unveiled in December as part of a Rs 76,000 crore or $10 billion packages, intends to nurture at least 20 indigenous semiconductor design companies and help them attain a turnover of more than Rs 1500 crore in the following five years. The DLI programme will be implemented by the Centre for Development of Advanced Computing (C-DAC), a scientific society that operates under MeitY. Chip Design infrastructure support, Product Design Linked Incentive, and Deployment Linked Incentive are the three components of the programme. C-DAC will establish the India Chip Centre to host state-of-the-art design infrastructures such as EDA Tools, IP Cores, and support for Multi-Project Wafer fabrication (MPW) and post-silicon validation) and facilitate its access to supported companies as part of the Chip Design Infrastructure Support programme. Reimbursement of up to 50% of eligible expenditures, subject to a cap of Rs 15 crore per application, will be offered as fiscal support to accepted applicants engaging in semiconductor design under the Product Design Linked Incentive component. Approved applicants whose semiconductor design for Integrated Circuits (ICs), Chipsets, System on Chips (SoCs), Systems & IP Cores, and semiconductor linked design is deployed in electronic products will receive a 6% to 4% of net sales turnover over five years, subject to a ceiling of 30 crore per application, under the Deployment Linked Incentive component. The DLI Scheme will also take a graded and proactive approach to identify national priorities and develop strategies for complete or near-complete indigenisation and deployment, thereby advancing import substitution and value addition in strategic and social sectors. Image Source

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