NITI Aayog Sets US Dollar 120-150 bn Semiconductor Target

01 Jun 2026 CW Team

The strategy endorses a differentiated More-than-Moore approach that leverages India’s strengths in chip design and targets niche segments rather than competing on leading foundry nodes. By 2035 India is projected to capture 10 to 13 per cent of the global semiconductor market while supporting a domestic market valued at US dollar 200 bn. It aims for 35 to 50 per cent self-sufficiency in demand and to retain 55 to 70 per cent of value capture domestically.

The roadmap is built around five pillars — Pioneering, Policy and Investment, Production, People and Partnership — to address capital intensity, talent shortages and long gestation. It proposes tiered support for electronic design and automation tools, a national design and packaging platform and an AI-enabled mission to accelerate design cycles. The Policy and Investment pillar estimates cumulative investments of US dollar 135 to 180 bn over the next decade and envisages the government providing about one third, around US dollar 45 to 60 bn, through a dedicated support fund to crowd in capital.

The Production pillar prioritises selective depth with wafer fabrication focused on mature logic nodes between 28 nm and 65 nm, specialty analog chips and opportunities in wide-bandgap materials. The plan aims for India to be a top three destination for outsourced semiconductor assembly and test (OSAT) and advanced packaging while exploring small modular reactors (SMRs) for dedicated energy to fabrication clusters. The People and Partnership arms propose a national fab academy, curriculum reforms and collaborations with trusted partners to mitigate export control risks and strategic vulnerabilities as India imports 90 to 95 per cent of its semiconductor requirements.

NITI Aayog has set a target of building a US dollar 120 to 150 billion (bn) semiconductor value chain by 2035 and released a 10-year blueprint in May 2026. The Frontier Tech Hub document outlines a phased strategy to move India from downstream consumption to an integral node in the global chip ecosystem. The roadmap follows the Union Budget 2026 announcement of ISM 2.0 and shifts focus from ecosystem creation to scaling capabilities. The strategy endorses a differentiated More-than-Moore approach that leverages India’s strengths in chip design and targets niche segments rather than competing on leading foundry nodes. By 2035 India is projected to capture 10 to 13 per cent of the global semiconductor market while supporting a domestic market valued at US dollar 200 bn. It aims for 35 to 50 per cent self-sufficiency in demand and to retain 55 to 70 per cent of value capture domestically. The roadmap is built around five pillars — Pioneering, Policy and Investment, Production, People and Partnership — to address capital intensity, talent shortages and long gestation. It proposes tiered support for electronic design and automation tools, a national design and packaging platform and an AI-enabled mission to accelerate design cycles. The Policy and Investment pillar estimates cumulative investments of US dollar 135 to 180 bn over the next decade and envisages the government providing about one third, around US dollar 45 to 60 bn, through a dedicated support fund to crowd in capital. The Production pillar prioritises selective depth with wafer fabrication focused on mature logic nodes between 28 nm and 65 nm, specialty analog chips and opportunities in wide-bandgap materials. The plan aims for India to be a top three destination for outsourced semiconductor assembly and test (OSAT) and advanced packaging while exploring small modular reactors (SMRs) for dedicated energy to fabrication clusters. The People and Partnership arms propose a national fab academy, curriculum reforms and collaborations with trusted partners to mitigate export control risks and strategic vulnerabilities as India imports 90 to 95 per cent of its semiconductor requirements.

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